Floating point implementation of an FFT block – optimization issues
نویسندگان
چکیده
The IEEE 754 Floating point standard [1] specifies a simple (32 bits) and double precision (64 bits). For the FFT block in a DSL modem (DMT based), even 32 bits proves to be too much, and a custom number of bits can be used. This in turn will lead to savings in area and power on the ASIC implementation. Several techniques were considered for reducing the number of bits.
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تاریخ انتشار 2003